Fabrication technology of GaN/AlGaN HEMT slanted sidewall gates using thermally reflowed ZEP resist and CHF₃/SF₆ plasma etching

Published in:
Int. Conf. on Compound Semiconductor Manufacturing Technology (CS ManTech 2013), New Orleans, USA, May 13-16, paper 041 (2013).
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Abstract:
In this work we present a technology of slanted sidewall gate fabrication using ICP etching of the SiN_x passivation layer with a thermally reflowed ZEP 520A electron beam resist as etch mask. The influences of reflow time and temperature on structure size and sidewall angle are studied. Furthermore, the dependencies of SiN_x etch rate, RF bias level, and etching selec-tivity of the SiN_x/ZEP mask on process parameters are deter-mined. A bulk SiN_x etch rate of ≈118 nm/min at an extremely low RF bias level of 8 V has been obtained. At these conditions SiN_x/ZEPmask selectivity is 2.5. Gate lengths of 50 to 250 nm at a gate foot sidewall slope of 70° have been demonstrated. Test transistors fabricated on 3" GaN/AlGaN-sapphire wafers show reproducible 50 nm and 100 nm gates with high yield.

Keywords:
SiN_x etch, ZEP 520A, GaN HEMT, Deep submicron gates