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  2. APECS Pilot Line

APECS Pilot Line

The pilot line for “Advanced Packaging and Heterogeneous Integration for Electronic Components and Systems” (APECS) marks a major leap forward in strengthening Europe’s semiconductor manufacturing capabilities and chiplet innovation as part of the EU Chips Act. By providing large industry players, SMEs, and start-ups with a facilitated access to cutting-edge technology, the APECS pilot line will establish a strong foundation for resilient and robust European semiconductor supply chains. 

Within APECS, the institutes collaborating in the Research Fab Microelectronics Germany (FMD), among them the Ferdinand-Braun-Institut, will work closely with European partners, to make a significant contribution to the European Union’s goals of increasing technological resilience, strengthening cross-border collaboration and enhancing its global competitiveness in semiconductor technologies. APECS is co-funded by the Chips Joint Undertaking and national funding authorities of Austria, Belgium, Finland, France, Germany, Greece, Portugal, Spain, through the “Chips for Europe” initiative. The overall funding for APECS amounts to € 730 million over 4.5 years.

Europe is home to a vibrant ecosystem of (hidden) champions, from traditional enterprises in vertical markets, to SMEs and start-ups the competitive advantages of which lie in superior semiconductor-based solutions. Nevertheless, many of these companies are currently confronted with limited access to advanced semiconductor technologies, while at the same time these technologies are increasingly becoming the most important factor for innovation and market growth.

The European Commission is investing significant resources under the EU Chips Act to strengthen semiconductor technologies and applications in the European Union. This aims to enhance Europe’s technological resilience, secure supply and value chains, and drive innovation in emerging fields such as energy efficient AI, manufacturing, mobility, information and communications, neuromorphic and quantum computing as well as trusted and sustainable electronics.

The APECS pilot line focuses on bridging application-oriented research with innovative developments in heterogeneous integration, in particular emerging chiplet technologies. By pushing beyond conventional system-in-package (SiP) methods, APECS will deliver robust and trusted heterogeneous systems, significantly boosting the innovation capacity of the European semiconductor industry.

More information on the APECS website