Vertical GaN on tungsten high-voltage pn-diodes – advancing cost-effective power electronics
Fig. 1. GaN membrane on tungsten vertical <i>pn</i>-diode schematic cross-section.
Fig. 2. Finished GaN on Tungsten 4-inch wafer.
Fig. 3. Wafer process flow; (a) temporary carrier bonding (b) GaN epitaxy membrane separation from the sapphire substrate by laser lift-off (c) GaN back side N-face ohmic contacts and bonding metal deposition (d) GaN membrane and tungsten wafer metal bonding (e) temporary carrier removal (f) final GaN membrane on tungsten substrate.
Fig. 4. Left: Wafer level <i>pn</i>-diodes reverse bias characteristic after front side process (quasi-vertical) and on tungsten substrate after backside process (fully vertical). Right: GaN <i>pn</i>-diodes on-state characteristic on sapphire (quasi-vertical) and on tungsten substrate (fully vertical).
GaN-based power switching devices with a vertical architecture for the 1200 V class offer high power density and switching efficiency. Achieving a blocking capability above 1 kV requires GaN drift layers thicker than 10 µm, which necessitates homoepitaxy on conductive GaN substrates. However, GaN substrates are more expensive than SiC and limited to smaller diameters, reducing their commercial competitiveness against SiC devices. To make vertical GaN power switches more cost-effective, growing semiconductor layers on larger, cheaper foreign substrates is necessary. Since these substrates lack the conductivity required for vertical devices, innovative substrate removal methods are needed. Promising approaches include local substrate removal for silicon and bandgap-selective lift-off for sapphire.
At FBH, in collaboration with other project partners, we are advancing this technology by developing GaN layer growth and device processing on sapphire substrates, combined with laser lift-off for substrate transfer. Laser lift-off offers a simple and efficient substrate removal process. In the present work we demonstrate the removal of electrically and thermally insulating sapphire substrates and the subsequent bonding of GaN membranes to tungsten substrates on a 4-inch wafer scale. This breakthrough paves the way for true vertical conduction in GaN layers originally grown on sapphire, bringing vertical GaN device technology closer to commercial viability and positioning it as a strong competitor to SiC devices. Vertical pn‑diodes were manufactured as a sensitive electronic monitoring device to assess the substrate transfer process. Fig. 1 and 2 depict a schematic cross-section of a GaN-membrane-on-tungsten vertical pn-diode and a finished GaN‑on‑tungsten 4-inch wafer.
Fig. 3 illustrates the principle manufacturing process flow of the GaN‑on‑tungsten pn-diodes. After front-side processing, the wafers are temporarily bonded top-side to a carrier wafer with a temporary bonding material. The original growth substrate is then removed through a laser lift-off process which utilizes an ultrashort pulsed laser for precision. Backside ohmic contacts are deposited on the N-facing side of the GaN membranes exposed by the laser lift-off. To enhance durability and functionality, a second layer of metals is applied to serve as reinforcement, diffusion barrier, and bonding metal on both the ohmic contact layer and a new conductive 4-inch tungsten substrate. Tungsten was chosen for its excellent electrical and thermal conductivity, market availability, and thermal expansion coefficient closely matching that of GaN. The GaN membranes are bonded to the tungsten wafer using a transient liquid phase bonding method, ensuring a conductive bond interface. After bonding, the temporary carrier is removed using UV laser debonding, completing the process.
Fig. 4 shows the electrical performance of vertical pn-diodes both before and after the Laser Lift-Off and bonding processes. Notably, the diodes demonstrate enhanced forward conductivity due to the creation of a full vertical conduction path through the tungsten substrate. This improvement is highlighted by a significant reduction in the minimum on-state resistance, which drops to approximately half, from 3.39 ± 0.23 mΩ cm2 to 1.71 ± 0.12 mΩ cm2. Additionally, current reduction caused by diode self-heating is minimized after transferring to the tungsten substrate. The reverse characteristics of the diodes remain largely unaffected, with only a slight increase in reverse-bias current. The average breakdown voltage changes from 1015 ± 47 V before membrane transfer to 988 ± 57 V after the complete process. Overall, the process yields a success rate of 74 %, measured by the number of stable devices that can withstand reverse bias above 650 V.
This work was partly supported by ECSEL JU through the European Union’s Horizon 2020 Research and Innovation Program and Germany, France, Belgium, Austria, Sweden, Spain, and Italy, under Grant 101007229.
Publications
[1] E. Bahat Treidel, E. Brusaterra, L. Deriks, S. Danylyuk, E. Brandl, J. Bravin, F. Brunner, O. Hilt, “Vertical GaN‑on‑Tungsten high voltage pn-diodes“, Proc. CS MANTECH, New Orleans LA. USA, 2025 (accepted for publication).
[2] E. Brusaterra, E. Bahat Treidel, L. Deriks, S. Danylyuk, E. Brandl, J. Bravin, M. Pawlak, A. Külberg, M. Schiersch, A. Thies, O. Hilt, "Vertical GaN-on-Tungsten High Voltage -Diodes from Sapphire-grown GaN Membranes," IEEE Elec. Devi. Lett. 2025. DOI 10.1109/LED.2025.3540156